Blank
Aan de slag
Blank
Carrièrekansen
Terug naar functiezoekopdracht

Senior Digital IC Verification and Design Engineer

  • Locatie:

    België

  • Contactpersoon:

    Andrew Cahill

  • Contractsoorten:

    Contract

  • Telefoon contactpersoon:

    +353 21 233 0164

  • Bedrijfssectoren:

    Software

  • E-mail contactpersoon:

    andrew_cahill@oxfordcorp.com

Develop next generation RF transceivers, supporting 4G (LTE) and 5G systems.

Today, we're seeking team players and technical leaders who get things done and share a passion for bringing new wireless technologies to the rapidly growing mobile market. Now is your chance to join the engineering team and develop new, world-leading products.

Job Description

We are offering a Sr digital ic verification and design engineer position enabling you to join the creation of the next generation mobile communication chip.

Responsibilites

  • This role includes technical hands-on expertise and excellent team skills; together with his/her team members, this candidate targets high and challenging standards on technical performance, product and process quality and project schedule.

Requirements

  • MSEE or equivalent with +3yr industrial experience on the verification of ASIC’s with high digital signal processing content.
  • This candidate can verify systems of low to moderate complexity with the support of an experienced team.
  • This profile is very much oriented at front-end verification with state of the art verification methodologies and methods.
  • Experience with back-end related verification topics such as Logic Equivalence Checking and Static Timing Analysis is a plus.
  • Knowledge of module, subsystem and toplevel verification
  • Hands-on experience with writing and maintaining tests in a structured flow such as UVM/e
  • Simulation based coverage (automated and functional)
  • Assertion based verification (ABV)
  • Experience with C/C++ and SystemC for system modelling is a plus
  • Experience with lint, clock and reset domain crossing and formal verification is a plus
  • Experience with UPF/CPF for simulation is a plus
  • Able to work in a Linux environment
  • Python, Perl, TCL scripting
  • Makefiles
  • Shell scripts
  • Experience with revision control systems such as SVN, GIT, Perforce
  • Knowledgeable about DSP algorithms is a plus
  • FIR, IIR, FFT, interpolation and decimation
  • Upsampling and downsampling
  • Excellent analytical skills
  • Good communication skills
  • Team-player
  • Result driven
  • Detail oriented and determined
  • Willing to relocate to Leuven (Belgium) region
  • An existing right to work in the EU required